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OS
架构x86,x64,ARM,ARM64
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OS
架构x86,x64,ARM,ARM64
描述
Simulator of a subtractor/adder (heart of the arithmetic-logical unit, ALU) of a computer.
You can display the value of the signals for operations, as well as the logic gates, for operands between 4 and 8 bits.
In black box mode, it only does the operations, but it can also visualize the decimal translation of operators and results.
When the black box tick is deactivated, it displays the value of the signals, as well as the complete full adder circuits.
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